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Proceedings of 2009 International Workshop on Information Security and Application (IWISA 2009)

Qingdao, China, November 21-22, 2009

Editors: Feng Gao and Xijun Zhu

AP Catalog Number: AP-PROC-CS-09CN004

ISBN: 978-952-5726-06-0

Page(s): 481-483

A 5Gb/s Optical Receiver Front-End in 0.18μm CMOS Technology

Qi An, lei Li, yuanjun Liang, and Lingzhi Ke

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A 5Gb/s optical receiver front-end for optical interconnection is presented in this paper. A transimpedance amplifier (TIA), limiting amplifiers (LA), output buffer and a bias circuit are integrated in deep N-well 0.18μm CMOS technology. As the input current amplitude is 30μA, the differential output voltage is achieved to be 124 mV. The linear gain is 78.8dBΩ and consumes 200mW under 1.8V supply. Without on-chip inductor, the core size of the circuit is only 800300μm2.

Index Terms

CMOS, optical receiver, transimpedance amplifier, limiting amplifier

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