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Proceedings of 2009 International Workshop on Information Security and Application (IWISA 2009)

Qingdao, China, November 21-22, 2009

Editors: Feng Gao and Xijun Zhu

AP Catalog Number: AP-PROC-CS-09CN004

ISBN: 978-952-5726-06-0

Page(s): 425-428

CMOS Preamplifier for High Performance Computing

Feiyan Qin, Lei Li, Qi An, and Yunfeng Wang

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A preamplifier was realized in SMIC 0.18μm CMOS technology for the applications of high performance computing. The preamplifier employs the regulated cascade (RGC) configuration as the input stage. Cadence Virtuoso simulations demonstrate the transimpedance gain of 55.75dBohms and -3dB bandwidth of 3.77GHz for 0.62pF photodiode capacitance from a single 1.8V supply. And when the input current amplitude is 30μApp, the output voltage is achieved to be 18.50mV. The simulation results demonstrate the preamplifier with DC consumption of 29.66mW could work in 5Gbps high performance computing data transmission system.

Index Terms

high performance computing, preamplifier, 0.18μm CMOS technology

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