ISSN : 1796-217X
Volume : 4    Issue : 1    Date : February 2009

Loop Kernel Pipelining Mapping onto Coarse-Grained Reconfigurable Architecture for
Data-Intensive Applications
Dawei Wang, Sikun Li, and Yong Dou
Page(s): 81-89
Full Text:
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Coarse-grained reconfigurable architectures (CGRA) provide flexible and efficient solution for
data-intensive applications. Loop kernels of these applications always consume much execution
time of the whole program. However, mapping loop kernels onto CGRA is still hard to meet
performance/cost constraints. This paper proposes a novel approach for automatically mapping
loop kernels onto CGRA with loop selfpipelining to optimize data-intensive applications. The
problem formulation is shown first. Then we present the resource sharing and pipelining of
lspCGRA, together with its template standard. Further, a loop kernel pipelining mapping is
proposed. The conclusions show that our approach gains less resource occupation by 16.3% and
more throughputs by 169.1% than previous advanced SPKM.

Index Terms
Reconfigurable computing, loop self-pipelining, data-intensive application, design decision