ISSN : 1796-203X
Volume : 4    Issue : 10    Date : October 2009

DTMOS Based Low Power High Speed Interconnects for FPGA
Kureshi Abdul Kadir and Mohd Hasan
Page(s): 921-926
Full Text:
PDF (611 KB)

This paper present new energy efficient methods of designing switches and routing interconnects
inside FPGA using novel variants of Dynamic Threshold MOS (DTMOS) instead of traditional NMOS
pass transistor based switches and interconnects. The extra needed transistors can be easily
shared, in multiplexer based routing architecture of FPGA, keeping area overhead to be minimum.
Extensive transistor level HSPICE simulation based on Berkeley Predictive Technology Model
(BPTM) for 65nm device at operating frequency of 300MHz shows an average 23.35% improvement
in power delay product (PDP) of simple switch (NMOS pass transistor) and an average 32.83%
improvement in the PDP of Virtex-II FPGA routing interconnects over conventional approaches. Since
FPGA consists of thousands of Multiplexer based routing interconnects, hence the overall
improvement in the PDP is significant.

Index Terms
Low power, High speed, Dynamic threshold-CMOS, FPGA -switches, interconnects