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International Journal of

Recent Trends in Engineering

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International Journal of Recent Trends in Engineering (IJRTE)

ISSN 1797-9617

Volume 1, Number 1, May 2009

Issue on Computer Science

Page(s): 425-429

Energy Consumption Optimization for Basic Arithmetic Circuits with Transistor Sizing Based on Genetic Algorithm

M. Grailoo, T. Nikoubin, and K. Navi

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Abstract

Transistor sizing is very important for determination of the circuit performance. As a result for providing fair evaluation, an optimal size of transistor is necessary. Genetic algorithm that is capable of reduction of search problem complexity uses the transistor sizing which is originally a kind of search problem in the large multidimensional search space for energy consumption optimization. Simulation results in this paper show that, compared with the Hybrid Tree Structure, the genetic algorithm transistor sizing exhibits better simplicity, initial values independency, optimization parameter independency and short runtime. The average improvement in the PDP is 7% for XOR/XNOR circuits and 17% for full adder. All the circuits are simulated using HSPICE circuit simulator in two technologies (0.13-μm and (0.18-μm) based on BSIM3V and TSMC model in 27.

Index Terms

Color and texture based image retrieval, clustering, 2D Wavelet transform, Neural network and Fuzzy logic

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